
DSP
VLVm1 Digital Signal Processor (DSP) for image processing
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The VLVm1 is the first of GPT’s optimized Variable Length Vector (VLV) DSP IP cores targeted at image processing. VLVs allow forward and backward code compatibility by architecturally specifying a vector length. Unlike SIMD which has a fixed width, VLV specifies an arbitrary and dynamic length for vectors. An implementation can be customized for performance/power/price based on the number of vector elements to be executed simultaneously. Code does not need to be recompiled when the vector length changes. Non-power-of-two vectors can be easily specified.
Combining GPT’s superscalar out-of-order ‘Unity’ CPU with a VLV execution unit, the VLVm1 processors run at up to 3GHz.
Variable-length vector (VLV) DSP technology features:
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Vector length register to specify any length (up to 64KB)
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Out-of-order instruction and out-of-order element processing
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Integer 16/32-bit, floating point 16-bit
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General computing and image processing vector instructions
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Software forward and backward compatibility