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GPT’s core business is the licensing of proprietary heterogeneous IP cores to companies creating Systems-on-Chips (SoCs) for applications such as assisted and self-driving cars, robotics, surveillance, and machine vision. GPT provides off-the-shelf IP cores as well as design integration services to help customers achieve first-pass functional silicon.


The company licenses its IP cores under the umbrella of its Unity Platform. Unity is comprised of scalable, low-power, performance-optimized processor cores that accommodate a wide range of applications. This includes CPU, DSP and AI cores, a number of industry-specific accelerators, and other IP cores such as GPUs which are in development.


All IP cores are implementations of a converged Instruction Set Architecture (ISA), the Unity 1.0 ISA, with a common ISA structure and relevant ISA extensions depending on the class of the processing element selected.

The GPT Unity Platform is a set of scalable, low-power, performance optimized processor cores.

Gary Nacer

President and coo,


  • A common ISA with backward-compatible application-specific instruction extensions that all processors execute

  • The ability to integrate any combination of CPU, GPU, DSP, and AI accelerators to flexibly and efficiently meet customer needs

  • A heterogeneous design with a common programming model that significantly reduces system development time

  • A single toolchain that supports all base instructions and extensions with a common view of the system


A key attribute of the Unity 1.0 ISA is its ability to efficiently map Heterogeneous System Architecture Intermediate Language (HSAIL) instructions. HSAIL is an intermediate language defined by the HSA Foundation™ which abstracts the complexities of compute devices in heterogeneous systems.


Unity provides significant advantages over the traditional silicon design process, leading to shorter design and verification cycles and requiring fewer development resources.

Unity Platform 

Designed around a powerful ‘CPU+’ concept

Unity Cores


Unrivalled scalability for your heterogeneous design


Hybrid digital signal and image processing with ultimate flexibility


Enabling fast, efficient AI inference at the edge


Highly efficient compute

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Deliverables with the Unity Platform IP

Hardware Deliverables


Soft and hard cores:

  • Soft cores provide the SoC designer the flexibility to integrate the Unity platform on to their target technology

  • Hard cores are pre-synthesized and pre-laid out implementations of the Unity IP in a pre-defined technology

  • Deliverables are consistent with major tool vendors such as Cadence and Synopsys


Functional test benches:

  • Block/unit level testing for soft core verification

  • Processor level verification for soft and hard cores


Synthesis scripts and timing constraints:

  • Synthesis scripts for soft core implementations

  • Timing constraints at block level for soft core implementation

  • Timing constraints at interface level for soft and hard core implementations

  • Constraints include false and multi-cycle paths


Deliverable Models

  • Hardware integration model: Provides a simplified Unity processor model for co-simulation in an SoC design

  • Software development model: High speed architectural simulation model for software development


Software Deliverables


  • Integrated Development Environment (IDE): Eclipse-based project management

  • GCC-based Compiler, Assembler, Linker and Debugger

  • Cycle accurate system simulator for efficient JIT implementation

  • HSA Finalizer to convert HSAIL executables to the Unity 1.0 ISA

  • Trace environment: Real-time hardware debugging on the hardware

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